The DRAGON project vision and objectives rely on a power efficient and silicon based BiCMOS transceiver analog front end, operating in D-band and enabling cost efficient deployment of telecommunications networks with seamless fiber performance. A beam steering integrated antenna array using an intelligent low-cost packaging technology will be developed for the implementation of the 5G network demo trial on field, with fine beam alignment for facilitating the installation and compensating pole vibration.
Reap the fruits of the RIA investments, by exploiting enabling technologies developed in the previous project H2020 DREAM, to demonstrate a wireless link transport capacity in the order of tens of gigabits
per second in D-Band in an operational environment. This will be an important milestone to support the
emergence of new markets and new market actors in Europe for the exploitation of the radio spectrum
On-field network demonstration of a wireless link at data rate up to 100 Gbs in D-band, based on:
- low-cost SiGe BiCMOS transceiver analog front end derived from the chip set developed in the DREAM project;
- ≥1024 element phased array active antenna;
- ≥256-QAM digital base band processor with Adaptive Modulation;
- Flexible Duplexing (fFDD), Full Duplexing (FD) and LoS-MIMO
Commercially enable wireless small cell backhauling links, with the very high throughput allowed by D-band frequency carriers.
The future Small Cells access point networks will require the availability on the market of compact and reliable D-band radios, which could even be integrated within the access point, to get low latency and multi-gigabit end-to-end connectivity at the cell edge with a cost effective approach
and low visual impact.
Increase the Quality of Service (QoS) and the flexibility for the network operator, by enabling the gradual virtualization of the radio protocol in centralized baseband (vRAN), through fiber-like D-band Front hauling. Small cell X-hauling connections, enabled by compact and low-cost D-band transceiver, with antenna fine beam steering option, allow the network coordination algorithm and the carrier aggregation.
Reduction of the cost and power consumption (green radio) of high data rate small cell backhaul/fronthaul links in D-band. The use of D-band radios, with high EIRP and antennas with fine beam adjustment, results in a reduced emitted power requirement, more efficient transmitter implementation and a better efficiency of the spectrum usage (since high frequency reuse can be achieved).
The project targets to reduce significantly the radios and network power consumption due per bit delivered.
The technical challenges
The development of low cost and small form factor components, systems and algorithms, which will enable flexible, high-data rate and power efficient D-band backhauling/front hauling into current and beyond 5G
mobile networks, will raise the following major 5G technical core challenges:
Prototyping and engineering a highly integrated D-band transceiver analog front-end chip set in low-cost SiGe BiCMOS process and a reliable millimetre-wave substrate technology for active antenna array packaging and industrial-ready assembling able to support a capacity of 25Gbps.
Prototyping a base band processor with integrated dual carrier solution (optimized 2+0), with embedded cross polarization interference cancelling (XPIC) technology configuration ready for Los-MIMO and/or FD Canceller. It will support a 25Gbps network Interface (towards ≥100Gb/s throughput), followed by an optimized network traffic signal processing including the carrier aggregation. The base-band processor will lower its cost to enable the massive deployment of small cells in urban environments.
Prototyping a full digital management of the transceiver including beam steering/forming functionalities. Implementing all features enabling factory calibration, facilitating installation and improving overall radio-link performance during normal operation in field including energy saving,
ATPC, RTPC, controlling, pointing, focusing and beam nulling.
Integrating an inexpensive and mass producible SiGe BiCMOS with multilayer antenna-in-package (AiP) and proper thermal management technologies to make low-cost, low-power large segmented phased arrays possible.
Prototyping and engineering a highly integrated D-band transceiver analog front-end chip set in low-cost SiGe BiCMOS process and a reliable illimetre-wave substrate technology for active antenna array packaging and industrial-ready assembling able to support a capacity of 25Gbps.